The reliability of integrated circuits and particularly of the interconnect patterns being part of these integrated circuits is an important topic in the development, the fabrication and the use of integrated circuits. There are several important disturbances inducing failure in conductive patterns. Examples of such disturbances are electromigration and power dissipation mismatch. These disturbances can occur in any current-driven conductive pattern. The effect of these disturbances on the lifetime of conductive patterns strongly depends on several parameters like e.g. the dimensions of those patterns, the current density and the conductive material used: e.g. Al, Cu or an alloy thereof. Conventional examples of criteria to identify failure in a current driven conductive pattern during lifetime, the so-called high value failure criteria, are a line opening in said conductive pattern or a 10% resistance change. In the past, several conductive test structures were produced in order to determine these failures. The test times needed to meet these conventional failure criteria are far too extensive and therefore these criteria are inadequate especially in the development phase of an IC process where a rapid performance feedback is indispensable.
Performing early resistance change (ERC) measurements is an alternative way to study non-electrical induced failure in conductive patterns. ERC measurements can provide a basis for lifetime predictions based on low value failure criteria making them particularly attractive for use in IC development and fabrication. A straightforward requirement for a good ERC measurement is a high measurement resolution, typically about 20 ppm. In general there are two basic techniques for early resistance change determination: a so-called absolute measurement technique and a so-called bridge technique.
This absolute measurement technique is addressed by e.g. the European patent EP 0395149 A1. This test technique measures the resistance, i.e. the resistance changes, of a conductive pattern during a limited period in an environment with a high temperature stability in a very accurate way. At the beginning of the test the intrinsic resistance of the conductive pattern is measured. A high current density is applied to the conductive pattern in order to enhance electromigration and a plurality of resistance measurements is performed while the test time elapses in order to determine the resistance changes. The major disadvantage of this technique is that one can not distinguish between the different disturbances inducing failure, i.e. it is not possible to distinguish between electromigration and resistance changes induced by temperature changes, i.e. due to power dissipation which can be quite significant at large current densities.
The conventional bridge technique makes use of two identical structures, i.e. two conductive patterns having the same dimensions and the same resistance, hereafter called test and reference which are processed on the same substrate in close vicinity of each other. One reason to implement two different structures can be to correct the measurements on the test structure for the external thermal induced resistance changes. The test structure is then stressed at a high current density, while the reference structure is sensing only a very small measuring current. The measurement on this reference structure is used to correct the measurement on the test structure for the external thermal induced resistance changes (see e.g. A Scorzoni et al, Materials Science Reports 7, p. 143-220, 1991). Another reason to implement two structures as in the United States patent U.S. Pat. No. 5,264,377, can be to correct for the topographic influences but in the latter case the structures are not identical.
One of the obvious disadvantages of the conventional bridge technique is that the measurements are still not corrected properly due to the power dissipation mismatch. The power dissipation in the test structure can be quite substantial because the test structure is sensing a high current density, while the power dissipation in the reference structure is much lower than in the test structure due to a huge difference in current density level. Furthermore because test and reference structure are so close to each other the large temperature increase in the test structure due to the power dissipation will affect the temperature of the reference structure. Consequently, it is still not possible to separate electromigration induced failures from failures induced by other disturbances. These disturbances are mainly thermal processes initiated by thermal changes caused by the power dissipation. Examples of such processes are Joule heating and the reversible and irreversible processes induced in a conductive pattern by Joule heating like e.g. precipitation.